Comparative Study of Steep Switching Devices for 1T Dynamic Memory
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Abstract
This work focuses on understanding the operation and performance of various steep switching devices (subthreshold slope sub 60 mV/decade), namely Thin-Capacitively Coupled Thyristor (TCCT), Field Effect Diode (FED), Zero sub-threshold swing and Zero impact ionization FET (Z2-FET), and Tunnel Field Effect Transistor (TFET) as capacitorless dynamic memory. Functionality as 1T DRAM depends on creation of potential well which must be induced in a p-i-n structure, achieved through precise doping of p-region (TCCT), asymmetric gate alignment (Z2FET, TFET) and use of two independent gates (FED and twin gate TFET). While TCCT, FED and Z2FET operate in forward bias, TFET operates in reverse bias. The work shows a comparative analysis of these devices in terms of retention time, sense margin, current ratio, power and speed which are crucial metrics for future DRAMs and also provides a guideline for application specific design.
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